There are two basic types of transistors, namely Field Effect Transistors (FETs) and bipolar transistors. In general, current is conducted in FETs by charge carriers (e.g., electrons and holes) typically flowing through one type of semiconductor material, either n-type or p-type materials. In bipolar transistors, current passes in series through both n-type and p-type semiconductor materials.
Within the category of FETS, there are two basic types, namely the Metal Oxide Semiconductor (MOS) FET and the Junction FET (JFET). A primary difference between these two types of transistors is that the gate of the MOSFET has a layer of insulating material, typically referred to as gate oxide, between the gate and the other transistor electrodes. Consequently, channel current in a MOSFET is controlled by the application of electric fields across the channel to enhance and deplete the channel region, as operation requires. The gate of the JFET forms a PN junction with the other electrodes of the transistor, which can be reverse biased by the application of a predetermined gate voltage. Thus, the gate PN junction can be utilized to control the channel current by varying the extent of a depletion region to selectively dimension the current-carrying channel. JFET devices are often employed in linear IC's to provide circuits having superior performance characteristics.
Complementary Metal Oxide Semiconductor (CMOS) Integrated Circuit (IC) technology, which is utilized to form MOSFET devices, is generally the most popular integrated circuit (IC) technology. CMOS offers the advantages of a relatively inexpensive, well-defined process, low power dissipation, and transistors that can be densely packed and scaled. These features make CMOS a popular choice for very large scale integrated (VLSI) circuits. As a result, CMOS has become the industry mainstay for many types of ICs.
Bipolar devices are generally characterized fast switching speeds, durability, power controlling abilities and high power consumption. So-called “Bi-CMOS” fabrication processes have been developed in order to combine the benefits of both bipolar and CMOS transistor topologies on a single integrated circuit. Bi-CMOS processes in the past that have attempted to optimize both types of transistors have suffered from high complexity and hence often result in a much higher cost than a standard CMOS process.
There is a need for improved JFET structures and efficient methods for fabricating JFET devices.